Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

problem with type matching

Hey guys! I'm having a problem with component instantiation. I keep on getting the an error in modelsim that my types dont match up: # ** Failure: (vsim-3807) Types do not match between compon...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

if you do netlist simulations, it is recomended that all ports from the DUT are std_logic_vector, as they will get converted to these when compiled.

Otherwise, dont bother doing netlist sims, and keep to RTL sims (in 15 years, I have never needed to run a gate level sim).