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Altera_Forum
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15 years ago

Problem with SDRAM and block schematic

I have a system with SDRAM controller core to connect to SDRAM chip on DE2 board. I know I will need to connect a PLL to the SDRAM clock signal, however I cannot figure out how to do this from my blo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

That is how I would have wired it. As the PLL I would suggest 50Mhz and -3ns Phase shift. You can easily find many threads for the DE2 here in the forum suggesting this values. Perhaps post a picture of your sopc sytem and describe your SDRAM settings. Have you got the chipselect and banks right?

!!!I forgot to mention one thing, your dq pin must be bidirectional. You can read dq to and from the ... so your pin allows only to give data to the sdram, but not getting something, change that accordingly. It's the green connection at the cpu!!!

Yours, Peter.