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Altera_Forum
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16 years ago

Problem with schematic entry

Hi All, I am using Altera's Schematic tool for the first time and I have a simple problem. I have a big SOPC's "BDF" block and on my top level I am connecting a PLM_DFF (BSF) block to one of ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

As I said in my question, Clock to the DFF is at the clock input and clearing\presetting it is at th correct signal level. I have all the inputs correctly at the FF inputs but I am not getting any output.

jsm