Forum Discussion
Altera_Forum
Honored Contributor
16 years agoThanks for the response. I do have a reset port in my design. Actually, this error is in auto-generated file (which is unexpected) and error is always produced for the last port in the entity, no matter if it is reset or any other signal. The only problem could be port mismatching and that was not the case. I wonder if myprocessoris instantiated in the myprocessor_0 does it do something during optimization as it compiles fine.