Forum Discussion
Altera_Forum
Honored Contributor
14 years agoIt's not clear to me what you intend with the code that does not work.
However, the code that does work will have to be the basis of what you want. Instead of having the address as a input to your module, you can simply generate the address(es) inside it. Something like: reg addr_a = 4'h0; allways @ (posedge clk) addr_a <= addr_a + 4'd1; reg addr_a = 4'h2; allways @ (posedge clk) addr_b <= addr_b + 4'd1;