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Altera_Forum
Honored Contributor
Honored ContributorProblem with AN351 and VHDL
I am trying to step through the AN351 lab and when I use the Verilog it runs to 2 ms and the transcript window shows "Hello from Nios II!" Now I am trying to use the VHDL test bench, the same steps ...
Altera_ForumHonored Contributor
Honored Contributoranother bad example of an application note, probably some of the procedure are also not up to date.
