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Altera_Forum's avatar
Altera_Forum
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11 years ago

problem JTAG programming an EPCQ256

I have a new terasic DE1-Soc rev D. Cyclone V SOC model 5CSEMA5F31C6N. I am unable to get JTAG programming to program the epcq256 on the board using quartus 14.

I am able to download and run the blinky light demo that came with the board via JTAG. And, I can modify the demo and re-download and see my changes. so the basic tool chain is working correctly.

But, I have carefully followed the directions in chapter 8 of the user manual that came with the board 6 or 8 times and also multiple variations. And, I am unable to program or erase the epcq256 flash.

Whenever I attempt to do this I get the following output(same from gui or cmd line).

Info (209060): Started Programmer operation at Thu Aug 28 13:12:48 2014

Info (209016): Configuring device index 2

Info (209017): Device 2 contains JTAG ID code 0x02D120DD

Info (209007): Configuration succeeded -- 1 device(s) configured

Error (209025): Can't recognize silicon ID for device 2

Error (209012): Operation failed

Info (209061): Ended Programmer operation at Thu Aug 28 13:12:51 2014

After extensive searching(and walking through the altera err msg trouble shooter) the only possibly relevant thing I've found is the altera kb http://www.altera.com/support/kdb/solutions/rd06032013_510.html that is about v. 13 and I have tried this to see if the bug still exists on 14 but it doesn't help.

Detailed SW version info:

windows 8

Quartus II web edition 64-bit (14.0.0.200) same problem with or without 14.0.1.205 patch

ModelSim 14.0.0.200

CycloneV- 14.0.0.200.qdz

Does anyone have any idea what I'm doing wrong or how to work around this?

thanks

11 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    That error message usually occurs when the EPCS/EPCQ device is not recognized, i.e., the device on your hardware is not an EPCQ256.

    Look at the markings on the EPCQ package and see if its an Altera device. If its not, that is ok, since there are compatible flash devices, but these devices have different Silicon ID codes. When you create the .jic file, click on the Advanced button, and disable the device ID check, and it should work.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    that's what the 13.1 bug workaround that I linked suggests. I've already disabled the id check with the "advanced" button in the UI(tried it twice) during .jic creation. it doesn't seem to help. the marking on the chip says EPCQ256N, 78584 VS, PHL 328

    is there a config setting someplace where I can just tell QuartusII that the ID I have *is* a EPCQ256?

    thanks
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Are you using Quartus 14.0? Perhaps the EPCQ256 is only supported in the latest edition. If you are using 14.0, then file a Service Request directly with Altera.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    I am facing the same issue with an Arria5 SoC Development Kit (Ref EPCQ: EPCQ256N, 78507 VS, PL 243).

    I tried :

    - Quartus Programmer 13.1 and 14.1

    - "Disabled ID Check" checked or not during jic file generation

    I always get :

    Info (209016): Configuring device index 2

    Info (209017): Device 2 contains JTAG ID code 0x02D030DD

    Info (209007): Configuration succeeded -- 1 device(s) configured

    Error (209025): Can't recognize silicon ID for device 2

    Error (209012): Operation failed

    Anybody has a solution?
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    --- Quote Start ---

    Anybody has a solution?

    --- Quote End ---

    No, sorry. But I can tell you how you can help yourself. Look at the package on the board and confirm that it is an EPCQ, and then create an FPGA design with an SPI master. Use that SPI master to read the SPI Flash identification registers. If you can do that, then you should be able to determine if the flash is correct, or whether there is a hardware issue.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Thanks for your answer, this is effectively a good way to investigate.

    Nevertheless, I will wait for the answer of my support because I can't spend too much time on this issue. I will use CFI as a workaround.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Have you set the FPGA to MSEL Active-Serial (such as 5'b10010 or 5'b10011)?

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Yes, I tried both

    Edit: When I set MSEL at 10010, MAX_AS_CONF is driven low (meaning Active Serial mode is enabled) but FPGA_nCS0 signal (EPCQ ncs input) is measured at 0.497V instead of GND.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Sorry but I have the same problem, does someone has it solved?

    Many thanks.