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anaza3's avatar
anaza3
Icon for New Contributor rankNew Contributor
6 years ago

Problem in using 2 NIOS cores with 2 PLLs and clock sources

I am trying to run two NIOSII cores on an DE0-CV board. They are supposed to run two application and don't need to share any resource. I also need them to run with two different clock rates. This is ...
anaza3's avatar
anaza3
Icon for New Contributor rankNew Contributor
6 years ago

Hi,

Thanks. Can I ask another question? Do you know if it is possible in this design to share the SDRAM ? not to share data with each other but to partition it and assign half of the SDRAM to each core.

Regards,

Alireza

AnandRaj_S_Intel's avatar
AnandRaj_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Alireza,

We are going out of the subject, Please open new case.

Which will help in keeping the community organized and easy for other user to search in community.

Do you know if it is possible in this design to share the SDRAM ?

Yes, shared peripheral.

not to share data with each other but to partition it and assign half of the SDRAM to each core.

It's similar to the Sharing Memory, which is discussed in below link.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/tt/tt_nios2_multiprocessor_tutorial.pdf

Regards

Anand