Problem in generating clock from constrained PLL clock

Your command makes no sense: you have three clocks there.

By "PLL clock", I assume you mean a PLL output clock.

The syntax for create_generated_clock is

create_generated_clock -name <name> -source <sourceClock> -divide_by 2 <targets>

<name> is just that, a pretty name to give to it.

<sourceClock> is the source clock object.. If your clock is being generated from a PLL output clock, then it will be something like

[ get_pins -hierarchical {PLL12|altpll_component|auto_generated|pll1|clk[0]} ]

<target> will be the objects where your generated clock comes from. Typically, it will be a register or so.