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Altera_Forum
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17 years ago

Problem generating NIOS II .bsf - .vhd

Hello I changend from Xilinx to Altera a few days ago. In that case I´m a newbie in Quartus. I´m using Quartus II 8.1 and I want to implement a NIOS II in my FPGA. SOPC Builder outputs 2 fi...
Altera_Forum's avatar
Altera_Forum
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17 years ago

the top level sopc verilog or vhdl file includes many modules/entities, only one of which is the top level. If you scroll all the way to the bottom of the file there is a test bench that includes the sopc system port declaration, you will find this matches the bsf.

--dalon