Problem assigning IO pin for MAX 10M08DAF484C8GES

Hi everyone,

I'm currently using Quartus Prime Lite 15.1.1 Build 189 to work on a hobby project on a BeMicroMAX10 development board that decodes a PPM signal into several PWM outputs. When I tried to test my design I ran into a problem with Quartus Prime Pin Planner.

The PPM to PWM decoder has 8 outputs, pwm_out[0..7] . When I assign the pins as following:

VREF group B5_N0

pwm_out(0) -> R15

pwm_out(1) -> P15

pwm_out(2) -> P15

VREF group B1_N0

pwm_out(3) -> D3

pwm_out(4) -> E1

pwm_out(5) -> F2

pwm_out(6) -> F1

pwm_out(7) -> G1

I ran into a strange problem. If I kept the pins' assigment as above. pwm_out(0 to 2) will not have any PWM output after the FPGA is configgured http://www.alteraforum.com/forum//images/icons/icon9.png . If I removed any one of the pins from pwm_out(3 to 7), I will be able to see my PWM signals on pwm_out(0 to 2).

I wonder if this is a problem with Quartus Prime Lite or it is a mistake I made when assigning these pins. Thanks you for your help