Forum Discussion
OrF
Occasional Contributor
Occasional Contributorpreserve logic or insert internal buffer
Hi is there any attribute to keep 2 consecutive NOT gate in synthesis ? some kind of preserve attribute , what I have found is preserving registers but logic gate (LUT) OR other option is the...
Hi Or,
Do the above comments help?
Regards,
Nurina
sstrell
Super Contributor
Super ContributorYeah, relying on delay like that is really not recommended. Just synch to a clock domain. Add a counter if the delay needs to be more than a single clock cycle.
