Preparing configuration data for EPCS ROM

In the setup I've been working on I have a Cyclone IV hooked up to a 16Mb ROM chip. I'm programming the ROM chip externally through a microcontroller.

The first method to prepare the configuration data uses two command I found on these forums.

sof2flash --epcs --compress --input=input.sof --output=input.flash
nios2-elf-objcopy -I srec -O binary input.flash input.bin

I'm able to program the input.bin file directly to the ROM chip and the FPGA configuration works without issue.

Since I'm not easily able to package up those two command for use on other computers I wanted to do the bit reflection myself.

I first take the .pof file of my design and use Quartus II to convert the programming file to .rpd. With this file I run it through a program that will take each byte and reverse the bits. When I compare the result of this to input.bin from above there are two differences which I'm not able to account for.

1. At 0x29: Method 1 yields 0xDF while using my bit reflection program yields 0xCF

2. At 0x49: Method 1 yields 0xBD07 while using my bit reflection program yields 0xAD01

I've tried this process with a couple versions of my design. Each time the difference is only at address 0x29 & 0x49 (0x49, 0x50). Can anyone explain why these values are different using these two methods? I'm hoping that these values are mostly benign I'd like to be certain.