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Altera_Forum
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9 years ago

Power analysis flow from OpenCL

Hi guys, I'm trying to figure out if I can carry out a power analysis on a kernel I have without firing up Quartus PowerPlay. My knowledge of Quartus and all that entails is lacking so if there...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Thanks for replying. I was hoping to actually supply signal activity but I'm struggling in generating vcd files via OpenCL. Doesn't seem to be any easy way to do this. The verilog generated isn't to amenable to simulation in modelsim