Post-Synthesis Simulation, What does it guarantee?

Hi,

To be honest...I have done several major broadcast projects over and over again depending entirely on functional simulation through a testbench and debugging using signal tap together with observing real final output e.g. signal spectrum and receiver tests. I never used timing simulation or post PR simulation ...etc. Provided your timing report is ok I trust the FPGAs will do what you expect.

In real industrial work, time is crucial for companies and there is no point finishing a project according to the recipe of University steps and block diagrams in the lecture room but too late for the market.

Of course some application areas are critical e.g. cores for various buyers and safety critical applications ...etc and these may justify a long testing time.

In real systems some issues may arise not beause the fpga got it wrong but because the pattern of inputs wasn't catered for especially so with power up

problems,unreachable states and clock phase problems. It is helpful to define reset values actively for all registers and this includes killing the don't care power-up of Quartus.

At the outset, the most important piece of work is a proper functional testbench that includes as many correct input patterns as possible. Do not simply depend on eyeballing the waveforms.