Porting GPU optimized OpenCL code to Altera FPGAs

The way in which it works is that you can specify one or more kernels and put these into an aocx file, but you can have one or more aocx files. If you have a single aocx file then this may contain several kernels, but these exist in parallel and can be used in parallel. If you only have one aocx file then this is configured just once. You should try and put all your kernels into one aocx file where possible.

If you have multiple aocx files then the delay will occur if you need to first use a kernel from one aocx file and then to use one from another, this requires reconfiguration. This will likely occur if you have large kernels which won't fit simultaneously into one device and so you have to manually decide which kernels go into your .cl file in order to create the aocx files. The worst case scenario is if you need to constantly swap between kernels from different aocx files.

I don't know what the reconfiguration delay is, and it will depend on the size of the FPGA. I would hazard a guess at a few 10s of milliseconds.