Forum Discussion
Altera_Forum
Honored Contributor
14 years agokaz,
It seems like your 2nd and 3rd sentences set up premises that collapse on each other, but your last sentence about "real progress and not cosmetic surgery" definitely hits on the truth. Altera, in getting away from their old simulator, is pushing people to use more modern and industry-standard tools. As much as I have used the old Altera simulator, using Verilog and/or VHDL with a testbench and modern simulator is the current state of engineering... has been for quite a number of years now. It is a technology that is much more flexible and scalable to support both small and enormously large projects. You may counter with the fact that for the projects you work on, the old simulator works just fine. That may be true, but that is a very a very narrow and self-absorbed view. You cannot expect Altera to keep supporting an outdated methodology because you don't want to update your skill set. The software engineers who are tasked with maintaining that simulator could be used to help create new tools and features that are needed with the latest FPGA technology -- like a better device floorplanner or linting tool. I know that sticking with a tried and true methodology is efficient and comfortable, but we must all as engineers move and adapt with the technology and methods of the time we live in. Embrace the new world lfaustini, it is here.