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Altera_Forum
Honored Contributor
16 years agoHi guys! Happy New Year!
I got a working PLL and managed to modify it to do what I want it to do..well almost. Does anyone know how to cause a clock to have a 50% duty cycle?? The NCO's output clock (I hardlimit the output sine wave to get a clock) seems to have glitches with its duty cycle : every so often the duty cycle is less/more than 50%. This eventually accumulates and my clock drifts.