Please Help!!! .text linker section assignment in NIOS BSP Editor

The code will run faster from the on-chip memory but the main difference is also how you upload your software to the FPGA. When using on-chip memory, you can upload your software through JTAG and execute it directly without flashing it. It will of course not survive a power cycle, but for development it makes things easier and faster.

Then when you want to write your software permanently, if using the external flash then you just have to write it to the flash, but if you use the on-chip memory things are a bit more complicated. You need to generate a .hex file, check that the .hex file is the one used to initialize the on chip ram in Quartus, recompile the Quartus project (or at least run the assembler, I think it's enough), and flash the whole FPGA image.