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Altera_Forum
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14 years ago

Please help me with setup slack error

Hi: I use FPGA to capture 6 channel ADC output simutaneously. The pin of ADC output clock is COUT and 8MHz. The width of ADC output data is 16 bits. The time of valid data is about half of the ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

I am still not convinced by referring to tSU/tH of an outputting device. These are parameters that apply to inputting device(fpga in your case). It could be what ADC recommends for the receiving device.

A variable tCO would mean skew and that will be evident on min/max tCO or min/max recommended tSU/tH