Honored Contributor
Honored ContributorI understand you have three ADC clocks each at 8MHz then I will try this:
Assuming tCO = half clock period, you may lower min values to say 62.0 create_clock -name {adc1_cout} -period 125.000 [get_ports {ADC1_COUT }] create_clock -name {adc2_cout} -period 125.000 [get_ports {ADC2_COUT }] create_clock -name {adc3_cout} -period 125.000 [get_ports {ADC3_COUT }] set_input_delay -max -clock [get_clocks {adc1_cout}] 62.5 [get_ports {ADC1_DA [*]}] set_input_delay -add_delay -min -clock [get_clocks {adc1_cout}] 62.5 [get_ports {ADC1_DA [*]}] set_input_delay -max -clock [get_clocks {adc2_cout}] 62.5 [get_ports {ADC2_DA [*]}] set_input_delay -add_delay -min -clock [get_clocks {adc2_cout}] 62.5 [get_ports {ADC2_DA [*]}] set_input_delay delay -max -clock [get_clocks {adc3_cout}] 62.5 [get_ports {ADC3_DA [*]}] set_input_delay -add_delay -min -clock [get_clocks {adc3_cout}] 62.5 [get_ports {ADC3_DA [*]}]
