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Njoroge's avatar
Njoroge
Icon for Occasional Contributor rankOccasional Contributor
10 months ago
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Platform Designer UI

The Platform Designer UI in Quartus Prime Pro 25.1 has not been improved to scale appropriately to the screen in use. For a screen with max resolution of 1366x768, the "View" menu is too long, fillin...
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  • RichardT_altera's avatar
    RichardT_altera
    9 months ago

    Thank you, Njoroge, for your valuable and constructive feedback.

    We’ve taken your input into consideration, and it is planned to be incorporated into the next-generation Platform Designer.

    While I don’t have visibility into the final implementation just yet, we look forward to seeing the improvements in 2026.

    Hopefully, it will offer a significantly enhanced user experience.

    Regards,

    Richard Tan

RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
10 months ago

Since the feedback has been provided to the tool specialists and is planned to be incorporated into the future Platform Designer, I will transitioning this thread to community support.


If you have any further questions or concerns, please don't hesitate to reach out. Please login to https://supporttickets.intel.com/s/?language=en_US , view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support.

The community users will be able to help you on your follow-up questions.


Thank you and have a great day!


Best Regards,

Richard Tan



Njoroge's avatar
Njoroge
Icon for Occasional Contributor rankOccasional Contributor
10 months ago

While we're at it, I also would ask whether the whole Quartus software tool is up for a rework. From my point of view, the tools at the moment are still quite similar to those that were used when FPGAs were largely used for prototyping digital circuits and as such the design was more from an HDL approach than IPs. Now with increased FPGA/FPSoC applications like AI, compute acceleration, RF and more, doesn't that warrant a redesign of the entire software suite?

I am also of the opinion that the three seperate ways that Quartus is shipped might be stifling time and resource allocation into developing one software tool that works for all devices. That would enable that one software tool to be as perfect as possible since the software development team focuses all their resources and time on just the one. The hardware side of things, like the new Agilex devices, is looking like it's outpacing the software tools for it, case in point the Platform Designer being discussed.

All in all, thank you for the feedback provided to the development team on my behalf.

Njoroge.

  • RichardT_altera's avatar
    RichardT_altera
    Icon for Super Contributor rankSuper Contributor
    10 months ago
    Now with increased FPGA/FPSoC applications like AI, compute acceleration, RF and more, doesn't that warrant a redesign of the entire software suite?


    I’d like to further understand your concerns. Could you please share more details about the pain points you’re experiencing when using Quartus, as well as your expectations on how the software should be redesigned to better support FPGA/FPSoC applications?

    I am also of the opinion that the three separate ways that Quartus is shipped might be stifling time and resource allocation into developing one software tool that works for all devices.

    I assume the three versions you're referring to are Quartus Pro, Standard, and Lite. We previously discussed the possibility of consolidating these into a single software package that supports all devices. However, due to resource constraints, that idea was rejected, and it's unlikely we will see a unified Quartus software in the near future.

    Additionally, the underlying tools used in the Pro version differ from those in the Standard/Lite versions. Integrating them into a single package could introduce potential bugs and compatibility issues. It would also significantly increase the disk space required for installation, which could be a concern for some customers who only use one device family and do not need the full software suite.


    Regards,
    Richard Tan

    • Njoroge's avatar
      Njoroge
      Icon for Occasional Contributor rankOccasional Contributor
      10 months ago

      It's mostly just boils down to the UI in my experience and that was the feedback provided by you to the development team. Some IPs like the HPS are quite lengthy on their connections. Of course you can filter by connections to make the connecting process easier but I just wonder whether a block design approach like in Simulink would be better now with increasing I/O count for IPs. This would be my main suggestion. I am assuming this being a major upgrade, it would not just happen in the next release but would be scheduled for something like the PD nextgen you mentioned planned for next year or later.

      Other issues highlighted before on this thread by me could be resolved by just increasing the user customizability of Platform Designer's UI especially the scaling. Long menus could be made to resize better than they do or split into two columns if the screen resolution is like my 1366x768 or smaller.

      Thank you,

      Njoroge.