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gyuunyuu's avatar
gyuunyuu
Icon for Contributor rankContributor
6 years ago

Platform designer testbench PLL component does not match entity

I am using Quartus 18.0 and generating ​testbench from the Platform designer (aks Qsys) system. The Qsys system contains a PLL. When I generate testbench files, the list contains a .vho and a .vo fi...
Vicky1's avatar
Vicky1
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

Could you please share the instantiation template for verilog from path as below,

Generate Menu->Instantiation template

Also check by editing those signal mention as 'export', name them & try to check testbench under *_tb directory for testbench directory.

Regards,

Vicky