Forum Discussion
MMavi
New Contributor
7 years agoPlatform designer generates faulty interconnect addressing unless I use Assign Base Addresses. I don't want to use it since Addresses changes for every change in the design.
Hi, I use Quartus Prime 17.1 Standard Edition. Currently, I work on a project with arria10SoC FPGA. In the project, I use Platform designer to connect some custom blocks to HPS via LWB. There are ...
sstrell
Super Contributor
7 years agoYou can click the little lock icon in the Base Address column in Platform Designer to prevent assigned addresses from getting changed when you use the "Assign Base Addresses" command.
As for the manual addresses you are trying to assign, slaves connected to the lightweight bridge are assigned to a specific area of the address map of the processor. Perhaps the addresses you are assigning are not in that area which is why it is failing.
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