Forum Discussion

Aswinkrishnan's avatar
Aswinkrishnan
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Platform designer Avalon Communication

Hi I am trying to generate a simple system which consists of an Avalon MM master BFM and an Avalon memory mapped slave. My avalon slave consists of two components, having an interface to the other ...
Aswinkrishnan's avatar
Aswinkrishnan
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Avalon Master has these Avalon ports as output. The Avalon slave has an Avalon slave port as input. When we generate HDL for the entire system, in the port declaration of the entity, Avalon ports can't be seen.

In platform designer, component, show signals, Avalon signals can be seen though.

I will look into this more.