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FRoth's avatar
FRoth
Icon for New Contributor rankNew Contributor
7 years ago

Platform designer automatic interconnect bandwidth behavior

We have a DDR3 memory with internal interface width 512 bits running at 200 MHz Avalon bus speed. We want to connect several master components to this memory using the one Avalon slave port. We are u...
BoonT_Intel's avatar
BoonT_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

FRoth, I'm sorry I'm not aware that the interconnect have such feature to convert the width. My previous understand is that interconnect is 1:1 connection for its data. Thanks JKastil for correction and I learned new thing about interconnect today.

FRoth, regarding your usability scenario, we do not have an accurate answer for it. I will suggest you run a simulation on it and check the outcome.