Period of functional simulation period too short

Hi,

I've problems getting Quartus 6.1 displaying longer periods of functional simulation. By default, I'm reading on the master timing bar a simulation period ranging from 0 ps to 1us. My design requires longer periods of simulations. Although I'm following the help procedure by going to the "Assigment" tab -> "Setting" and checking the "end simulation at" checkbox and write down the needed simulation period, the master time bar keep showing 1us as the longest simulation period. For example, what if I want to simulate for 100 us?

I've tried to decrease the clock period for the same max 1us simulation time range. It does work but compilation time uncreases dramatically. Finally, what was left is to simulate one block at a time using the same clock for all the blocks that make up the whole circuit. Actually, I would need a simulation of 800x528 ns to simulate a VGA controller.

Am I not following the right procedure to get longer simulation times?

Thanks for your help.