PCIe BFM

Tricky,

When you generate the PCIe core using MegaWizard, all the testbench files including the BFM are also generated. For example, if you generate a core called "pcie_core", then the BFM will be in the location similar to.

..\pcie_core\pcie_core_examples\chaining_dma

Have you tried that?

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So Altera have decided to stop shipping the PCI BFM with their IP, meaning their simulation demos are now a bit useless:

# ** Failure: SUCCESS: BFM model not available!

So the reply from mysupport was:

"the error that you are seeing is not because you have done anything wrong, or that you are using vhdl rather than verilog as your simulation environment. unfortunately i have been instructed to report that due to business concerns, altera is not currently shipping a pci express bus functional model in the current version of the tools. i'm afraid that there is not anything that i am able to do to assist you in generating a pci express bfm for this version.

in order to simulate interactivity with the pci express core, you will need to source a pci express bus functional model to plug into the testbench."

So does anyone know where I can get a PCI BFM model from that will work with this demo, or what was the last version of Quartus to ship with the BFMs?

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