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Altera_Forum
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13 years ago

PC Device communication howto

Hi, I'm a C programmer which is suppose to learn VHDL in 21 days;p. We're developing a device which is connected to 32 bit Atom processor with PCIExpress bus. We have Altera Aria II Gx FPGA. The devi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

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Yes i ment "not available". What a pity! Mayby You have, or anybody else a modelsim project created for VHDL?

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The problem is that Altera does not supply the required IP in VHDL format. If you want to use Modelsim-ASE and want to use Altera IP that is in Verilog or SystemVerilog, then you need to write your code in SystemVerilog too.

Cheers,

Dave