Forum Discussion
Altera_Forum
Honored Contributor
13 years agoModelsim is great, and saves me a lot of time. But now i have to figure out how can I include a vhdl library to the tesbench. I know that code mixing is now available in altera modelsim, is there any workaround to do it? Build a library, convert vhdl code to verilog, dowload diffrent simulation tool (trial verision?)? Whatever? Thank You.