Honored Contributor
Honored ContributorThe source you posted does not contain a real testbench. If you are serious about writing VHDL, then you need to learn how to use Modelsim, and how to write a testbench to test your components.
The readers of this forum are willing to help you learn and find your mistakes, but most readers will be too busy to create a testbench for you. Ignore the fact that you want to create a PCIe device to start with. Create Avalon-MM slave components and write testbenches for them. The PCIe interface is essentially complete for you already. Just modify this design from the Altera University Program: ftp://ftp.altera.com/up/pub/altera_material/12.1/tutorials/using_pcie_on_de4.pdf ftp://ftp.altera.com/up/pub/altera_material/12.1/tutorials/using_pcie_on_de4_design_files.zip I found this design a few days ago. I haven't used it, but it looks pretty complete. Cheers Dave
