Partition that will be filled in by QDB file - shouldn't need an 'entity'

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Note that I have also taken the Design Block Reuse training. The examples of 'black box' VHDL files in this training include the 'entity' declaration as well as 'architecture logic'. I am still confused as to why the black box must be defined in this way as opposed to the more common component declaration. I hope there is a way around this.

Even when I use the 'black box' VHDL from that training:

library ieee;
use ieee.std_logic_1164.all ;
entity sub is
port (
      input: in bit;
      clk : in std_logic ;
      output :out bit
      );
end sub;
architecture logic of sub is
begin
end logic;

I still see the following error:

Error(19326): The partition "sub" is loaded from a Partition Database File (.qdb) and is set to preserve with a Preservation Level assignment. These two preservation types cannot be combined.

I first ran Analysis & Elaboration on 'simple'. Since I added in the entity and logic architectures, this succeeded and provided me with the hierarchy view that included the 'sub' instance. Finally, I set the 'sub' instance as a partition with Preservation Level=synthesized, pointed the QDB file to the one that was exported from the 'sub' partition in the 'sub' project (after adding a dummy top module to the 'sub' project - again I hope this is not the solution...). When I run Analysis & Synthesis, it gives the error mentioned above.

Again, any help is much appreciated.

-dbanks12

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I determined that you only want to set the Preservation Level to 'synthesized' in the Developer project, and not the Consumer project. By leaving Preservation Level 'Not Set' in the Consumer project, I am able to synthesize successfully using the QDB partition files from the Developer project.

Parts of my original question still remain:

1. Do I absolutely need to use a dummy top module to export my module for use as a submodule in another project?

2. Do I absolutely need to have the entity declaration in the Black Box file, or is there some way that I can use a component declaration instead as I have done with Quartus Standard?

These may not seem like they are a big deals, but I am not trying to solve this problem for a single simple project. This problem arises when trying to modify existing automated compilation scripts and flows that worked in Quartus Standard and other compilation tools. I am generating component declaration black boxes for submodules, and it is not trivial to just decide that I will use entities in the future.

Also, any concerns or confirmations regarding whether or not I am doing things correctly (or in the best way) are much appreciated. I know my development flow might be non-standard, and it is that way for a reason :D

Thanks,

dbanks12