Altera_Forum
Honored Contributor
15 years agoParameterize and/or Infer a FIFO?
I have a circuit (in VHDL) that uses generics to parameterize the bus width and various other elements of my circuit. I now need to add a FIFO to my datapath and would like that FIFO to utilize the BUS_WIDTH specification from my generic inputs. The way I see it, there should be 2 options: (1) parameterize an Altera-generated FIFO to use my BUS_WIDTH spec, or (2) create my own parameterized FIFO from which Quartus can infer the necessary memory.
This seems like it should be really easy to do, but I can't seem to find any documentation on how I can accomplish it. Any help would be much appreciated. Thanks