Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorParameter type not supported?
Hello, When trying to use SystemVerilog parameter type to create a 'generic' fifo I get the following error Error (10170): Verilog HDL syntax error at generic_fifo.sv(5) near text: "ty...
Altera_ForumHonored Contributor
Honored ContributorHi,
Full SystemVerilog 2009 & VHDL 2008 support is only supported by the Quartus Pro versions. All other versions may not have full language support. For more info please have a look at the following link: https://www.altera.com/products/design-software/fpga-design/quartus-prime/download.html
