Forum Discussion
CJT
New Contributor
3 years agooutput or inout port "outA" must be connected to a structural net expression
//block1
module block1 (clk, inA, outA, outB, outC);
input clk, inA;
output outA, outB, outC;
reg outA, outB, outC;
always @ (posedge clk) begin
outA = inA;
outB = outA;
outC = outB;
end
endmod...
IntelSupport
Contributor
3 years agoAs we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 5/5 survey