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tde_m's avatar
tde_m
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Ordering of channel operations

Hello, I'm currently struggling with enforcing the order of write/read to channels. I know, from the Intel programming guide, that two independent channels operation can be re-ordered by the compil...
tde_m's avatar
tde_m
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Hi Douglas, thanks for your reply.

I've seen the warning, and I recognize that (from the compiler point of view) a potential cycle is recognized. Yet, this is want I desired and, in any case, the re-ordering of the compiler is not resolving this issue (which, in this case is not a problem).

So:

  • should I assume that the compiler will treat all the channel operations as independent even if there is a clear data dependency (write-after-read in this case)?
  • why the presence of the barrier increases the II up to 7?

Thanks for your support