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I checked the compilation for Arria10 GX works for compiler version 16.1 only.
With the latest version of compiler 18.1 one need to fix the RTL files as stated below.
Look for the "lsu_top' instance in files "sumOfElements.v" and "copyElement.v" and comment out following parameters. WIDTH, MWIDTH, INTENDED_DEVICE_FAMILY
//defparam lsu_local_bb0_ld_arrayidx3_promoted.WIDTH = 32;
//defparam lsu_local_bb0_ld_arrayidx3_promoted.MWIDTH = 512;
//defparam lsu_local_bb0_ld_arrayidx3_promoted.INTENDED_DEVICE_FAMILY = "Stratix V";
After this fix compilation is passed for target board Arria10 GX.
I will give a try to Stratix10 GX board now.
Thanks,
Arslan
- RYang287 years ago
New Contributor
Hi Arslan,
Thanks a lot for your help!
In fact, I didn't find such parameters you mentioned here in both .v file. The examples I used are from the latest updates of Quartus Prime Pro (Version 18.1.1 Build 263 Pro Edition).
Looking forward to your result on the Stratix10 GX board.
I paste the parameters list of "lsu_top" in both files below.
sumOfElements.v
{
defparam lsu_local_bb0_ld_arrayidx3_promoted.AWIDTH = 28;
defparam lsu_local_bb0_ld_arrayidx3_promoted.WIDTH_BYTES = 4;
defparam lsu_local_bb0_ld_arrayidx3_promoted.MWIDTH_BYTES = 64;
defparam lsu_local_bb0_ld_arrayidx3_promoted.WRITEDATAWIDTH_BYTES = 64;
defparam lsu_local_bb0_ld_arrayidx3_promoted.ALIGNMENT_BYTES = 4;
defparam lsu_local_bb0_ld_arrayidx3_promoted.READ = 1;
defparam lsu_local_bb0_ld_arrayidx3_promoted.ATOMIC = 0;
defparam lsu_local_bb0_ld_arrayidx3_promoted.ATOMIC_WIDTH = 3;
defparam lsu_local_bb0_ld_arrayidx3_promoted.BURSTCOUNT_WIDTH = 6;
defparam lsu_local_bb0_ld_arrayidx3_promoted.KERNEL_SIDE_MEM_LATENCY = 2;
defparam lsu_local_bb0_ld_arrayidx3_promoted.MEMORY_SIDE_MEM_LATENCY = 131;
defparam lsu_local_bb0_ld_arrayidx3_promoted.USE_WRITE_ACK = 0;
defparam lsu_local_bb0_ld_arrayidx3_promoted.ENABLE_BANKED_MEMORY = 0;
defparam lsu_local_bb0_ld_arrayidx3_promoted.ABITS_PER_LMEM_BANK = 0;
defparam lsu_local_bb0_ld_arrayidx3_promoted.NUMBER_BANKS = 1;
defparam lsu_local_bb0_ld_arrayidx3_promoted.LMEM_ADDR_PERMUTATION_STYLE = 0;
defparam lsu_local_bb0_ld_arrayidx3_promoted.USEINPUTFIFO = 0;
defparam lsu_local_bb0_ld_arrayidx3_promoted.USECACHING = 0;
defparam lsu_local_bb0_ld_arrayidx3_promoted.USEOUTPUTFIFO = 1;
defparam lsu_local_bb0_ld_arrayidx3_promoted.FORCE_NOP_SUPPORT = 0;
defparam lsu_local_bb0_ld_arrayidx3_promoted.HIGH_FMAX = 1;
defparam lsu_local_bb0_ld_arrayidx3_promoted.ADDRSPACE = 1;
defparam lsu_local_bb0_ld_arrayidx3_promoted.STYLE = "STREAMING";
}
copyElement.v
{
defparam lsu_local_bb1_st_.AWIDTH = 32;
defparam lsu_local_bb1_st_.WIDTH_BYTES = 4;
defparam lsu_local_bb1_st_.MWIDTH_BYTES = 64;
defparam lsu_local_bb1_st_.WRITEDATAWIDTH_BYTES = 64;
defparam lsu_local_bb1_st_.ALIGNMENT_BYTES = 4;
defparam lsu_local_bb1_st_.READ = 0;
defparam lsu_local_bb1_st_.ATOMIC = 0;
defparam lsu_local_bb1_st_.ATOMIC_WIDTH = 3;
defparam lsu_local_bb1_st_.BURSTCOUNT_WIDTH = 5;
defparam lsu_local_bb1_st_.KERNEL_SIDE_MEM_LATENCY = 2;
defparam lsu_local_bb1_st_.MEMORY_SIDE_MEM_LATENCY = 16;
defparam lsu_local_bb1_st_.USE_WRITE_ACK = 1;
defparam lsu_local_bb1_st_.ENABLE_BANKED_MEMORY = 0;
defparam lsu_local_bb1_st_.ABITS_PER_LMEM_BANK = 0;
defparam lsu_local_bb1_st_.NUMBER_BANKS = 1;
defparam lsu_local_bb1_st_.LMEM_ADDR_PERMUTATION_STYLE = 0;
defparam lsu_local_bb1_st_.USEINPUTFIFO = 0;
defparam lsu_local_bb1_st_.USECACHING = 0;
defparam lsu_local_bb1_st_.USEOUTPUTFIFO = 1;
defparam lsu_local_bb1_st_.FORCE_NOP_SUPPORT = 0;
defparam lsu_local_bb1_st_.HIGH_FMAX = 1;
defparam lsu_local_bb1_st_.ADDRSPACE = 1;
defparam lsu_local_bb1_st_.STYLE = "BURST-COALESCED";
}