Personally, I have never seen coalesced accesses be inferred as aligned ports, they have always been non-aligned in my experience. However, this might not be universal case and for very regular coalesced accesses, the compiler might infer aligned ports. In your case, you have two offsets in your address (a_address and b_address); it is likely that it is very difficult for the compiler to predict whether these offsets would be aligned or not and hence, it infers non-aligned ports. In practice, you are not going to lose much performance, if at all, if all your accesses are aligned but the memory port is non-aligned.