Forum Discussion
Altera_Forum
Honored Contributor
12 years agoThe actual implementation matters depending on what you're after. In my case, it's saving as much space as possible. Looking at the RTL design the separate state-machine seems to bury most of the combinatorial logic inside the LE's, which is kinda what you want whereas the single statemachine has a boatload of combinatorial crap hanging off on the right of it. Now I don't know if that's an accurate visualization but it seems to make sense.
Anything that has lots of combinatorial logic (i.e. large state-machine) will potentially waste registers that can't be used, which means you're not utilizing your resources the fullest extent. It also means that you should get faster performance when you 'front-load' combinatorial logic which is, for all intents and purposes, free. Of course, in this day and age this doesn't really matter that much but when you're working with an FPGA with 6144 bits or RAM and only 576 LE's, it does :-) -Mux