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Altera_Forum
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12 years ago

One segment vs two segment State Machine style

Hello to everybody, I am trying to decrease usage of elements in my project for Cyclone IV in Quartus II 13.0. I found the way of improvement synchronous sequential circuits in the book (rtl ha...
Altera_Forum's avatar
Altera_Forum
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12 years ago

I don't think the book claim is worth it. separating logic from registers is already the very structure of FPGA.

Resource depends on your design and in this case you have added extra counter for the two segment case.

I normally use one clocked process for any state machine, clean, timing safe,no latches and readable at the expense of extra registers.