Node * determined to be a clock

I didnt read it properly first time. The problem comes because you're connecting data_from_ram and DataIO to themselves when in certain states - this is where the latches come from. Latches are bad because you cannot analyse them with timing analyse and they are highly affected by temperature and subject to glitches.

So it is best not to use latches. Either connect them to a constant or something else in the others case, or synchronise them (as would be the prefered option). With synchronised registers for these pins they can be placed in the fast IO registers to make the output timings easier to control.