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Altera_Forum
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9 years ago

No SDO file produced for Timing Simulation

I'm following the guide to get started with a MAX10 board: ftp://ftp.altera.com/up/pub/altera_material/16.1/tutorials/vhdl/quartus_ii_introduction.pdf, It's all very straightforward: I added so...
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Altera_Forum
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8 years ago

Hey, I'd just like to add some specifics to what skyjuice88 posted above. Max 10 does not support "Gate-level timing". This is stated on [pg 12 : table 1-2] in that pdf he linked to. This is from the official Altera guide quartus prime standard edition handbook volume 3: verification (https://www.altera.com/en_us/pdfs/literature/hb/qts/qts-qps-5v3.pdf).

I thought I'd add this in case that link broke in the future.

I was having trouble with this as well. We got these "DE-10 Lite" boards for a class at the University of Florida. We're supposed to use .sdo files in ModelSim, but our boards can't generate it according to the above. To solve this, I ended up running the compilation for a random Max V device to get the .sdo file.