Altera_Forum
Honored Contributor
15 years agoNo content int the on-chip memory in simulation ?
Here is my problem.
I have done a little processor in verilog. I have create a new SOPC component for it and i connect it to an onchip memory. With my de2, i have a good behaviour. I can see that by SignalTap : On reading the memory, data come back from the memory on the readdata. The onchip has been initialized with "memory content editor" With ModelSim, - I generate the SOPC system with support for simulation, - I launch the simulation The problem : In reading the memory, no data come back from the memory on the readdata port, in the wave window. I suppose it is a problem with the memory initialisation with ModelSim. I have written some information in the generated .dat file ( in <sopc_name>_sim/<memory_name>.dat ). I have tried different format : - lines of 8 hexadecimals : 00000000 08000001 - hexadicimal format like this : :10000000241000002411000024121000261000010A :100010003C010001342186A0120100030000000011 :100020000800000300000000241000002631000139 :10003000AC111000080000030000000000000000E8 :00000001FF - hexadecimal format like this :0400000000000000FC :0400010024110000C6 :0400020008000004EE :0400030000000000F9 :0400040000000000F8 But no data came back from the onchip in the simulation. There is no error. I hope i am explicit enough. Any suggestion ?