Nios II Simulation issue -- Software issue

Hello everyone,

I deisgned a Nios II-based system under SOPC Builder, to which I connected my own custom logic. This logic is Avalon-capable and is mapped (0x22000 - 0x2207f).

My Nios II contains a cpu, ALTSYNCRAM on-chip memory, a jtag_uart, a timer and an interface to custom logic.

my goal is to write and read data from the nios to this custom ip, that basically consists in dumb registers.

To achieve that, I wrote a small piece of C-code software, that continuously write data at address 0x22000 and read it right after.

while
(1)
{
 
//Read transaction
reg1 = IORD_16DIRECT(0x22000,0x0);
printf("Valeur registre 1 before write trans.: %d\n",reg1);
//Ecriture
IOWR_16DIRECT(0x22000,0x0,0x0C);
 
//Relecture
reg1 = IORD_16DIRECT(0x22000,0x0);
printf("Valeur registre 1 after write trans.: %d\n",reg1);
 
}
 

The Nios generation goes well, as well as the code compilation under Nios II IDE. The .hex and .dat memory init files are generated.

The problem is that I should see a never-ending sequence of write and read transactions when simulating the design under Modelsim, and I don't see any R/W operations at all.

It feels like ModelSim does not see any software code at all.

My question is : Is there a way to ensure that ModelSim seesthe.hex/.dat files as it should?

Thanks a lot!