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Altera_Forum
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9 years ago

Newbie vs VHDL: season 01 episode 01

Hi all Since I am new to VHDL I have some questions (that probably you will find trivial): 1. Is good practice to define a behavioural architecture with one single process inside or it is ...
Altera_Forum's avatar
Altera_Forum
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9 years ago

synchronisation means using a clock. The template is: 


process(clk, reset)
begin
  if reset = '1' then
    -- reset goes here
  elsif rising_edge(clk) then
    
    --synchronous stuff goes here - including state machines
    case state =>
      when state1 =>
        -- do something
     ....etc
    end case;
  end if;
end process;

The good thing about doing a state machine this way is you only need a single process, and you will never get latches.