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Altera_Forum
Honored Contributor
13 years agoI broke down the big adder into a series of 40 32 bit adders, creating a 1280 bit adder -- you need to write an "adder_32" module, which is a 32 bit adder with carry in and carry out.
I pass the carry signal between two adders through an LCELL primitive to break the carry chain. I used a generate statement to generate the 40 adders and 40 LCELLs, instead of repeating the code 40 times.