Honored Contributor
Honored ContributorHi josyb,
Thanks for your response. FTDI_CLK is supplied by the FT245 chip, but FTDI_CLK_ext is a virtual clock to represent the latch clock as this is what is suggested in Rysc's TimeQuest guide. That is the problem I have been finding, with only a 16.67ns clock period and a requirement for an 11ns setup time, timing has been failing as I only have 5.67ns in which to accomodate both the clock delay and the data delay. I know how to instantiate a register normally, but not how to use the input and output registers that are already connected to an IO pin. The timing report for the failing pins is shown in the attachment. The biggest bottlenecks all appear to be the actual IO pin itself with about a 3ns delay being created there... Once again, thanks for your time, Regards, Lee H
