Forum Discussion
AAnch
New Contributor
New ContributorNew Component Editor: Peak Virtual Memory
Hi, I am trying to import my custom RTL code and create a new component for integrating into the existing system on Platform Designer. I am getting the below error message when i do "Analyze Synthe...
AAnchNew Contributor
New Contributor- My intent is not to import black box in platform designer but only to create the component. Well actually the component editor is only needed to create the interface signals for integration. I actually started with full RTL code but since i had this issue removed the not needed code as its redundant for the component creation. My intent is to replace it with complete RTL during the synthesis step.
- There is no additional error messages for me to debug from where this issue is coming up.
- I tried by removing space and comments but still the same issue. In fact i tried with just Clk and reset declarations also but still same error message.
- Well i see this error during the component creation step. So it can't be device fitment related error. At this time i am trying to create a new component with the editor
- I am working with "Quartus Prime Lite Edition 18.1.0" version. This is the latest 1 available.
- I am implementing this on Max10 FPGA. Also targeting to use Intel Max10 development board. So using the reference files for baseline pins from the design example files provided.
