Honored Contributor
Honored ContributorHi Dave,
It's really a pleasure to have such discussion with you! First let me briefly illustrate my purpose and why I come here to seek for help. As I mentioned, I'm doing some research of FPGA chip testing. My research is application-oriented, which means I only test the LUTs being configured after downloading the codes. To achieve this, I need to calculate a serials of testing vectors(set for input pins, that's what I said as controlling the inputs) for each circuit so that I can know there is a fault in specific LUT by observing the exceptions of the output pins. Right now I want to add a self-test state for application circuit every time the chip start up with the method of finite state machine. Therefore, I need to use the AS mode and have the testing vectors data stored in a flash. To avoid to trouble of designing PCB and establishing FPGA system with external storage and configuration chip, I choose to use a DE2-70 kit. But I need to make sure that my method is compatible to other FPGA chips. According to my knowledge of the practical industrial world, there is hardly a circuit in FPGA uses more than 400 input pins. Besides, for most circuit downloaded into the FPGA chip, the size of the sum of testing vectors is smaller than 1MB. The toughest problem I face is where to store the testing vectors, which may change the entire structure of my Verilog codes. The parallel flash of 8MB takes about 50 I/O pins from FPGA chip including address pins, data pins and control pins, which I assume too many. That's why I'm considering using a serial flash. --- Quote Start --- 400 pins on what? An external device controlled by your DE2-70? Whether or not 400 pins is an issue depends on how fast you have to update them. If they pin states do not need to be updated rapidly, then a shift-register with double-buffered output registers is a simple solution (the double buffering allows you to shift a new value and then update all the values at once). --- Quote End --- Usually, the speed is not an essential problem so I consider the serial flash a better choice. If we face a circumstance in which we have to care about the speed, then we should use parallel flash. Besides, I've used the double-buffer structure in the build of parallel flash because I can only read 16 bits from the flash once and there is often more than 16 input pins in the application circuit. Again, I should appreciate you for being so patient and discussing such detailed problem with me. Best Wishes, Miao
