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I know what you mean. I've considered this but I don't want to store the input data inside the FPGA chips.
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Before you make that decision "final" lets discuss some of your options.
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In fact, I need to set the input pins fixed to a series of data, and the size of the input data can sometimes be as large as 1MB, larger than the RAM of some FPGA chips.
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But tiny in comparison to the SDRAM or DDR memory on many kits. For example, the DE0-nano has 32 MB SDRAM.
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I've already tried to store these data in an external flash. However the flash will take too many pins from FPGA.
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Why do you have to test all pins? The sequence you wanted above consisted of only 5 bits :)
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That's why I firstly mentioned to edit the .rpd files because I was considering utilizing the EPCS chips which would take less pins.
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You can store data in the EPCS devices without having to edit the .rpd file. The .rpd file is just the part of the EPCS device that is used for the configuration data. After the FPGA has configured, you can access any remaining areas of the Flash. In fact, you could just use a separate SPI Flash device for your needs.
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Later, you mentioned JTAG and BIST. This may be a feasible solution because I can store the data in my computer and take no extra pins from the FGPA. As you can see, the original problem is to find a place to store the data and take as little resource(pins & RAM) as possible from the FPGA. That's why my question seems a little convoluted.
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You can still store your data on your PC if you want. You can send data from your PC to the FPGA at about 600kB/s using JTAG, so 1MB of data would not take long.
Do you have an Altera development kit? Perhaps I can send you an example to run and it will help make it easier to understand your options.
Cheers,
Dave
Honored Contributor
